GAL16LV8ZD |
RFQ for GAL16LV8ZD Required Field |
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| Product | Manufacturers | Pack | D/C |
| GAL16LV8ZD | - | LATTICE | 2004+ |
The GAL16LV8ZD, at 100 µA standby current and 15ns propagation delay provides the highest speed low-voltage PLD available in the market. The GAL16LV8ZD is manufactured using Lattice Semiconductor's advanced 3.3V E2CMOS process, which combines CMOS with Electrically Erasable (E2) floating gate technology.
The GAL16LV8ZD utilizes a dedicated power-down pin (DPP) to put the device into standby mode. It has 15 inputs available to the AND array and is capable of interfacing with both 3.3V and standard 5V devices.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.
Features |
| • 3.3V LOW VOLTAGE, ZERO POWER OPERATION - JEDEC Compatible 3.3V Interface Standard - Interfaces with Standard 5V TTL Devices - 50µA Typical Standby Current (100µA Max.) - 45mA Typical Active Current (55mA Max.) - Dedicated Power-down Pin• HIGH PERFORMANCE E2CMOS TECHNOLOGY - TTL Compatible Balanced 8 mA Output Drive - 15 ns Maximum Propagation Delay - Fmax = 62.5 MHz - 10 ns Maximum from Clock Input to Data Output - UltraMOS® Advanced CMOS Technology• E2 CELL TECHNOLOGY - Reconfigurable Logic - Reprogrammable Cells - 100% Tested/100% Yields - High Speed Electrical Erasure (<100ms) - 20 Year Data Retention• EIGHT OUTPUT LOGIC MACROCELLS - Maximum Flexibility for Complex Logic Designs - Programmable Output Polarity• PRELOAD AND POWER-ON RESET OF ALL REGISTERS - 100% Functional Testability• APPLICATIONS INCLUDE: - Glue Logic for 3.3V Systems - Ideal for Mixed 3.3V and 5V Systems• ELECTRONIC SIGNATURE FOR IDENTIFICATION |
